DOI: 10.1021/acsaelm.6c01223 ISSN: 2637-6113

Structure-Dependent Ferroelectric Enhancement in Hf0.5Zr0.5O2 Thin Films under High-Pressure Post-Deposition Annealing

Jun Young Beom, Hye-Jin Oh, Seokwon Lim, Taewon Hwang, Chang-Kyun Park, Jin-Seong Park

Abstract

Hf0.5Zr0.5O2 (HZO) is a promising ferroelectric material for next-generation nonvolatile memory devices as it enables switchable polarization in ultrathin films while remaining compatible with Si-based processing. However, achieving strong ferroelectricity under top-electrode-free post-deposition annealing (PDA) conditions remains challenging because capping-induced mechanical confinement, typically provided by a top electrode during post-metallization annealing, is absent. Nevertheless, PDA avoids sacrificial top-electrode processing, providing effective routes for enhancing HZO ferroelectricity under top-electrode-free conditions, which are important for gate-stack integration. In this study, we investigated high-pressure PDA as a top-electrode-free route for enhancing ferroelectric HZO and clarified how the deposition structure affects the pressure-induced response. Nanolaminate and homogeneous HZO films were prepared via atomic layer deposition (ALD) and annealed under different pressure conditions. High-pressure PDA enhanced the polarization of both structures; however, the improvement was substantially greater in homogeneous HZO. After high-pressure PDA, homogeneous HZO exhibited an approximately two-fold increase in 2Pr, from 15.4 to 30.3 μC cm–2, and an endurance improvement of more than one order of magnitude up to ∼108 cycles. Structural and morphological analyses indicated that homogeneous HZO exhibited a more pronounced pressure-induced structural response, including stronger suppression of the monoclinic phase and greater roughness relaxation, than nanolaminate HZO. These results demonstrate that high-pressure PDA is an effective strategy for improving ferroelectric HZO under top-electrode-free conditions and provide process design insights for ferroelectric HZO gate-stack integration.

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