Research on Zero-Crossing Distortion Suppression Method for Three-Phase Line-Voltage Cascaded Boost High Power Factor Rectifier

The three-phase line-voltage cascaded Boost high power factor rectifier topology has been extensively studied for front-end rectification in high-power charging equipment. However, obvious current distortion occurs near the input voltage zero-crossing point under high-power conditions, which introduces severe harmonics and degrades system stability. Conventional studies often attribute zero-crossing distortion to spike distortion and discontinuous inductor conduction, yet these explanations cannot fully account for the waveform distortion observed in practical engineering scenarios. Based on the one-cycle controlled three-phase Boost PFC converter, this paper establishes a dynamic model to analyze the evolution of distortion under power-frequency grid and various load conditions. The study reveals the key source of current zero-crossing distortion: the fundamental phase shift of input current induced by inductor inertia and digital control delay. Furthermore, a reference current phase-lead scheme is adopted to suppress current zero-crossing distortion. Simulation and experimental results demonstrate that the proposed model can accurately capture current distortion characteristics. This phase compensation strategy can effectively improve the input current waveform, reduce harmonic content and enhance system stability near the rated operating condition, providing theoretical basis and technical support for the optimal design of PFC systems in high-power DC charging piles.