Monolithic III–V Membrane Photodetectors on SOI with 240 Gb/s Data Reception

Abstract

Optical interconnects for high-performance computing and AI systems impose stringent requirements on photodetector performances, including high responsivity, high bandwidth, and low dark current at elevated temperatures. Here, we demonstrate waveguide-coupled lateral III–V/Si membrane photodetectors monolithically integrated on a 340 nm SOI platform using selective lateral heteroepitaxy. In contrast to previously reported ultracompact devices, the proposed architecture enables scalable membrane structures with lengths ranging from 5 to 50 μm, geometrically separating the optical absorption length from the carrier transit distance while maintaining a low junction capacitance, thereby alleviating the responsivity–bandwidth trade-off. With optimized device geometry and optical coupling design, the devices achieve responsivities of 0.8 A/W at 1310 nm and 0.6 A/W at 1550 nm, a 3-dB bandwidth over 67 GHz, and a low dark current of 2.6 nA at −1 V and room temperature, which remains as low as 52 nA at −1 V and 130 °C. High-speed data transmission up to 120 GBaud is demonstrated for both OOK (120 Gb/s) and PAM4 (240 Gb/s) formats. These results establish a scalable pathway toward next-generation energy-efficient optical interconnect systems.