Interface Engineering: The Critical Pathway to High-Efficiency and Stable Perovskite Solar Cells

Abstract

Against the global demand for renewable and sustainable clean energy, perovskite solar cells (PSCs) have shown great potential as a next-generation photovoltaic technology, owing to their high photoelectric conversion efficiency (PCE) and low-cost potential. Although the highest PCE of PSCs has exceeded 27%, poor stability and severe nonradiative recombination loss still hinder their further development. PSCs contain several critical interfaces, including the electron transport layer (ETL)/perovskite, hole transport layer (HTL)/perovskite, and charge transport layer (CTL)/electrode, which strongly influence carrier dynamics and dominate device efficiency and stability. Interface engineering has attracted extensive attention as an effective modification strategy, yet a systematic review focusing on its working mechanism is insufficient. In this review, we analyze the influence of interfacial defects on carrier dynamic processes and comprehensively summarize the latest progress of interface engineering in PSCs from ETL/perovskite, HTL/perovskite, and CTL/electrode aspects. We highlight the key roles of interface engineering in rationalizing energy-level alignment, passivating defects, optimizing perovskite film quality, and improving device stability. We also provide general guidance for selecting appropriate interfacial strategies according to specific performance bottlenecks. Finally, the challenges and future perspectives of interface engineering toward high-performance PSCs are discussed.