DOI: 10.3390/electronics15184240 ISSN: 2079-9292

Integrated Analytical Design of Boost DC–DC Converters and Cascade Current-Mode Control Using Integer- and Fractional-Order Lead–Lag Compensators

Carlos Muñiz-Montero, Gerardo Peña-López, Esteban Tlelo-Cuautle, Sandra Huerta-Moro, Carlos Sánchez-López, Juan A. Arizaga-Silva, Luis A. Sánchez-Gaspariano

This paper presents an integrated specification-driven analytical methodology for the design and practical implementation of cascade-controlled Boost DC–DC converters using integer-order and fractional-order lead–lag compensators. Unlike empirical tuning and optimization-based approaches, the proposed framework derives the controller parameters analytically from prescribed transient- and steady-state-performance requirements and, for the fractional-order lead–lag (FO–LL) controller, explicitly incorporates the control-effort level as an additional design specification. The methodology integrates converter sizing, averaged small-signal modeling, controller synthesis, rational approximation of fractional-order dynamics, electronic realization, and software-assisted verification within a reproducible workflow implemented in MATLAB, Simulink, and Simscape. The methodology is first evaluated using a numerical assessment case that examines sensitivity to the fractional approximation order, operation away from the nominal point, converter-parameter variations, controller-component tolerances, and load disturbances. Practical feasibility is then demonstrated using a separate experimental implementation case based on a second Boost converter with a hybrid IO–LL/FO–LL cascade configuration, evaluated through three validation levels—block-level simulation, switching circuit-level simulation, and experimental evaluation. The circuit-level and experimental evaluations exhibit consistent transient behavior under their respective test conditions, with representative overshoots of 5.02% and 4.2%, respectively, while the experimental prototype maintains a steady-state error of approximately 1% and achieves approximately 91% conversion efficiency. Overall, the results demonstrate that the proposed methodology provides a systematic and reproducible path from performance specifications to practical controller realization while retaining stable operation and implementation-oriented control effort under the evaluated modeling, operating, and hardware variations.