High Density Hearing Aid Chip Packaging

There has been enormous worldwide effort

to increase the volumetric efficiency of electronic

packaging. Much of this effort has been driven by the telecommunications industry that has succeeded in reducing cell phone size while simultaneously increasing functionality. The hearing aid business has always had the need to use extremely small electronic packaging because hearing aids pack electronics into the ear canal. Today’s hearing aids such as Starkey’s S-Series product have extensive computing power and run sophisticated hearing algorithms that have tremendous impact on a patients quality of life. The industry trend is to put more memory, more signal processing capability and more wireless capability into hearing aids to increase functionality and to improve performance. In order to achieve higher performance, the hearing business has had to develop and execute 3D packaging well ahead of other industries. This paper will examine the history of ceramic packaging at Starkey. The challenges and drivers for each technology step will be addressed.

Various issues will be examined including: available ASIC technologies, impact of chip metallization, solder interconnect temperature hierarchy, overcoming routing design limits, use of embedded passives, mixed wire bonded and flip chip attached die, and materials limitations. The following technology changes will be examined along with their impact on thick film ceramic device packaging: move from analog to digital devices, benefits realized utilizing flip chip attach, chip stacking, use of conductive epoxy instead of solder, migration to stacked thick film ceramic interconnect layers using vertical interconnect channels, and the incorporation

of RF devices.