Heterophase-Engineered Cs3Cu2I5/CsCu2I3 Memristors with Two-Step Resistive Switching
In Kyu Moon, Dohwan Jung, Young Pyo Jeon, Tae Hyeong Kim, Jinwoo Choi, Jungwoo Oh, Youngjong KangAbstract
The quest for energy-efficient memory technologies is critically hindered by the performance gap between high-performing but toxic lead-based perovskites and their environmentally benign yet less reliable lead-free counterparts. Here, we address this challenge by engineering the controlled coexistence of crystallographically 0D Cs3Cu2I5 and 1D CsCu2I3 phases using a scalable, hot-air-assisted process. The resulting heterophase architecture produces composition-dependent structural, interfacial, and chemical environments that strongly influence resistive-switching behavior. The optimized devices exhibit a high ON/OFF ratio of up to 7.4 × 108, more than three orders of magnitude higher than that of the corresponding single-phase films, together with electroforming-free operation and a reproducible two-step SET process that provides distinct resistance states for multilevel memory operation. Combined electrical, XPS, cross-sectional STEM/EDS, and post-switching ToF-SIMS analyses support a hybrid valence-change memory/electrochemical metallization (VCM-ECM) filament-evolution framework involving halide-deficient pathways, Cu–O-related oxygen-containing environments, and redistribution of Ag- and Cu-containing species. The two-step SET behavior and two threshold-like regions in the log–log I–V characteristics are consistent with multistage changes in trap occupancy and conductive-path connectivity without requiring direct assignment of the individual transitions to specific vacancy species. These results demonstrate heterophase engineering as an effective materials strategy for regulating local ionic and electronic transport in lead-free halide memristors and provide a pathway toward high-performance, multilevel nonvolatile memory and other ionically active solid-state devices.