Feature-PLPD-Aided Visual–Inertial Odometry for Low-Cost Embedded Systems

Visual–Inertial Odometry (VIO) has become a key technology for motion estimation in robotics and autonomous systems. However, deploying accurate VIO pipelines on embedded platforms remains challenging due to the trade-off between estimation accuracy, real-time performance, and energy consumption. This paper presents a hardware-aware Feature-PLPD VIO framework that integrates a point-and-line visual front-end with a loosely coupled Error-State Extended Kalman Filter (ESEKF) back-end. The proposed approach follows Algorithm Architecture Adequacy (A3) principles to preserve estimation robustness while limiting computational and memory requirements. To investigate its scalability across the considered resource constraints, two end-to-end embedded implementations are developed: a performance-oriented stereo VIO system on a GPU-based platform using GPU-aware software design, and a frugality-oriented low-cost RGB-D-assisted monocular VIO system on an FPGA-based architecture using hardware–software co-design with depth scale correction. The stereo GPU-based implementation is evaluated offline in both outdoor and indoor environments and is additionally validated through real-time on-the-fly deployment on a Scout Mini robot, whereas the FPGA-based implementation is evaluated offline using the indoor VICON dataset. Experimental results demonstrate meter-level trajectory accuracy and real-time performance under strict resource constraints. Averaged over four KITTI sequences, the proposed ESEKF-based fusion reduces the translation and rotation ATE by approximately 25% and 18%, respectively, compared with the corresponding VO-only configuration, while a 10% reduction in translation ATE is achieved in the indoor VICON environment, resulting in a normalized ATE of 5.09% over the 23.77 m trajectory. Both embedded implementations sustain around 20 fps, and the architectural evaluation highlights complementary accuracy–runtime–energy trade-offs between the GPU- and FPGA-based solutions. These results demonstrate the feasibility of scaling the proposed embedded VIO framework toward resource- and energy-constrained robotic applications under the investigated experimental and hardware configurations.