Electrostatics of Common‐Channel Reconfigurable Field‐Effect Transistors: From X‐Shape to U‐Shape

This work investigates the effect of scaling on the electrostatic behavior of cross‐shape reconfigurable field‐effect transistors (RFETs) using three‐dimensional technology computer‐aided design simulations. The emerging device concept consists of multiple nanowires in a junction of a common channel, where multiple gates are aligned on the silicon and silicide junction interface, enabling polarity switching and signal routing within a compact layout. Although such a geometry can be utilized for new directions in neuromorphic or analog computation, it significantly increases the electrostatic interactions. The focus of the work is to understand the impact of the gate‐to‐gate distance and nanowire width on the on‐state current. The energy barrier in the ungated common‐channel region was found to be the limiting factor, as excessive fringing field coupling at short gate‐to‐gate distances causes electrostatic crowding and barrier sharpening, thereby restricting carrier transport. To overcome the electrostatic limitation of the cross‐shape RFET, a three‐dimensional U‐shape RFET was proposed. Due to its gate‐all‐around coverage of the metal–semiconductor junctions, electrostatic control was found to be stronger. U‐shape geometry achieves a high on‐state current with a minimal sensitivity to gate‐to‐gate distance variations. This work derives practical design guidelines for 3D RFET architectures, aiming to balance device compactness and electrostatic efficiency.