Electrical Modeling of Amorphous InGaZnO Transistors with Electrolyte Gate Insulation Incorporating Non-ideal Ionic Effects

Abstract

Electric double-layer transistors (EDLTs) have attracted considerable attention owing to their ultrahigh interfacial capacitance and low-voltage operation. However, existing models usually rely on idealized ionic assumptions, leaving the influence of non-ideal ionic interactions on device behavior poorly understood. Here, we develop an electrical model for a-IGZO EDLTs that incorporates ionic-size asymmetry (ξ), finite ion-size effects (γ), and short-range correlations (α). This framework enables a unified description of interfacial charge accumulation, voltage partitioning, and transistor characteristics by self-consistently coupling the two EDLs formed within the electrolyte with the electrostatic response of the semiconductor channel. The results show that non-ideal ionic effects regulate device operation by modifying interfacial charge accumulation, electrostatic screening, and voltage partitioning. Specifically, ξ fundamentally alters the voltage partitioning between the two EDL interfaces, while γ determines the onset of steric saturation and limits the maximum attainable interfacial charge density. More importantly, increasing α significantly enhances the interfacial charge density and semiconductor surface potential, yet reduces the drain current by compressing the effective channel-driving potential through nonlinear voltage redistribution. These findings demonstrate that enhanced interfacial charge accumulation does not necessarily translate into improved transistor conduction. The proposed model identifies voltage partitioning as a key mechanism governing electrolyte-gated transistor operation, establishing a direct physical link between microscopic ionic interactions and macroscopic device performance.