Device‐to‐System Perspectives on Scalable Ising Machines for Physics‐Driven Computing

ABSTRACT

Combinatorial optimization problems (COPs) are fundamental to numerous applications but remain challenging due to their exponentially large solution spaces and the limitations of conventional computing architectures. Ising machines have emerged as a promising alternative by mapping optimization problems onto the energy minimization of the Ising Hamiltonian. Various hardware implementations, including quantum annealers, digital annealers, and coherent Ising machines, have been explored based on distinct physical mechanisms. More recently, emerging device‐based approaches have gained significant attention for their potential to enable scalable and energy‐efficient optimization. In this review, we present a comprehensive overview of Ising machines from both theoretical and hardware perspectives, with particular emphasis on three emerging‐device‐based platforms: crossbar array‐based, stochastic p‐bit, and oscillator‐based Ising machines. We establish a comparative device‐to‐system perspective that traces how distinct physical and device properties translate into computational primitives, hardware architectures, and ultimately system‐level scalability. Platform‐specific bottlenecks, including array nonidealities and peripheral overhead in crossbar‐based systems, device variability and probability‐generation overhead in p‐bit systems, and synchronization and coupling‐network complexity in oscillator‐based systems, are quantitatively and qualitatively analyzed. Finally, we discuss future directions toward scalable and energy‐efficient Ising hardware through device‐to‐system co‐optimization across devices, circuits, architectures, and algorithms.