DOI: 10.3390/jlpea15010009 ISSN: 2079-9268
Design and Analysis of a Novel 12-Bit Current-Steering–Capacitive Digital-to-Analog Converter
Xian Yang Lim, Boon Chiat Terence Teo, Venkadasamy Navaneethan, Wu Cong Lim, Liter SiekThis article introduces a novel digital-to-analog converter (DAC), which addresses a few weaknesses that a traditional capacitive DAC (CDAC) has, such as matching and parasitic capacitance-induced code dependency and a challenging bridge capacitor design. Our novel idea is a hybrid DAC of a CDAC and a current-steering DAC (CSDAC) and is named the CSCDAC. In this paper, a 12-bit CSCDAC is designed, and the post-layout simulation is provided. The Nyquist 12-bit CSCDAC exhibits a spurious free dynamic range (SFDR) of 67.62 dB under an operating frequency of 2 GS/s, with an expected average power of 54 mW. The 12-bit CSCDAC occupies a 0.154 mm2 die area, whereas the core area is 0.044 mm2.