Continuous Au-Sn-Ni-Cu-Pb (ASN-CP) Layer Formation on Double Tin and Wicked Thick-Au/Ni Plated Printed Circuit Boards

This paper describes a thin (~200 nm) continuous intermetallic layer containing Au, Sn, Ni, and sometimes Cu and/or Pb (referred to as the ASN-CP layer) observed at the Ni-SnPb eutectic solder interface on both the pad and component sides of a completed solder joint after double tin and wicking to remove Au on thick Au over Ni-plated pads. The source of each of these elements within the layer was considered. Changes in the heat application method used during the tinning operations did not alter the layer formation, but the adjacent circuit geometry showed a noticeable effect. Circuitry with wider traces exiting the tinning location had a higher likelihood of containing the ASN-CP layer than pads with narrow traces. Finally, a thermal cycle life test was performed on solder joints containing the ASN-CP layer which indicated that the layer thickened over many thermal cycles and grew a secondary AuSn4 intermetallic layer which adversely affected the fatigue behavior of the solder joints containing the layer. Thus when implementing a double tin and wicking processes on thick Au PCBs it is necessary to account for the geometry of circuitry adjacent to the solder interconnect locations, particularly in high stress locations where BGA, LCC or other limited-strain-relief package interconnects are made.