Compensation-Aware Topology Synthesis of Multistage Op-Amp

The structural richness of analog integrated circuits poses significant challenges for automatic topology synthesis. Direct transistor-level construction introduces excessive structural details, whereas overly coarse abstraction may obscure critical transistor-level behaviors. This paper addresses the topology synthesis of multistage operational amplifiers (Op-Amps), whose compensation-dependent structural diversity makes automated synthesis particularly challenging. We propose AnalogSyn, a tool for compensation-aware topology synthesis of multistage Op-Amps. By decomposing synthesis into a two-step procedure, AnalogSyn organizes the topology synthesis space in a PZ-guided manner. At the macromodel level, compensation variability is explicitly captured, and infeasible topologies are efficiently pruned using a formal symbolic pole–zero analysis. At the transistor level, each validated macromodel is transformed into multiple transistor-level implementations via intermediate hypergraph representations, enabling structural diversity without blind enumeration. Experimental results demonstrate that AnalogSyn can recover most representative published three-stage Op-Amp topologies in our benchmark and generate previously unreported variants with promising initial pre-layout sizing results. Compared with existing methods, AnalogSyn achieves richer compensation strategy diversity and more efficient, interpretable topology-space exploration.