Closing the Implementation Gap in Integer- and Fractional-Order Proportional–Integral–Derivative Control: A MATLAB–PSpice Co-Design Study of a Buck Converter

Fractional-order proportional–integral–derivative (FOPID) control offers additional tuning freedom, but a controller selected in an ideal or averaged model may not remain preferable after circuit realization and switching-level evaluation. This simulation study quantifies that implementation gap for a 24-to-12 V, 100 kHz direct-current-to-direct-current (DC–DC) buck converter using four matched controllers: model-domain proportional–integral–derivative (PID) and FOPID designs and counterparts optimized with explicit physical controller circuits in Cadence PSpice (Simulation Program with Integrated Circuit Emphasis, SPICE). Fractional operators used a fixed Oustaloup index N=1, preferred-value resistor–capacitor components, and finite-bandwidth active stages. Controller identities were fixed before evaluation on eight held-out full-switching scenarios. Robustness combined 500 paired bounded-uncertainty draws with deterministic interval-polynomial stability analysis of the realized rational closed loops. Physical-domain PID reduced the median normalized integral of time-weighted absolute error by 9.49% relative to model-domain PID, with all 500 paired draws favoring it, and both realized PID loops were certified robustly stable over the declared tolerance box. Physical-domain FOPID produced median error ratios of 8.13 versus model-domain FOPID and 60.10 versus physical-domain PID; its reduced realized model also admitted an unstable parameter point within the same tolerance box. Implementation-aware optimization can therefore improve conventional PID modestly and consistently, while fractional-order flexibility does not guarantee an implementation-level advantage under a fixed analog-realization policy.