Chemical Resistant Dicing Tape for Hybrid Bonding Process

Amid the growing demand for high-speed data transfer and communication among components such as processors, memory, and accelerators, hybrid bonding has emerged as a pivotal technology. It enables high-density interconnects and surpasses traditional wire bonding and flip-chip methods. Currently, Wafer-to-Wafer (W2W) bonding is the mainstream approach in hybrid bonding , However, Die-to-Wafer (D2W) bonding offers improved yield by allowing the selection and stacking of known-good dies. Compared to flip-chip technology, D2W enables finer interconnects, making it essential for achieving heterogeneous integration in advanced electronic systems. Nevertheless, the productivity of D2W bonding is significantly affected by contamination control, which remains a major challenge. Contaminants such as grinding debris, cutting residues, and deposited layers -particularly those generated during plasma dicing (PD)- must be effectively removed. Inadequate removal can result in defects such as voids, misalignment, and cracks, ultimately reducing yield. To mitigate these risks, high-temperature cleaning processes using specialized chemicals designed to target specific contaminants are crucial. However, the conventional dicing tapes (DCTs) exhibit insufficient chemical resistance and poor die retention under high-temperature conditions.  The development of a DCT with enhanced chemical resistance and strong die retention at elevated temperatures would eliminate the need for tape replacement during processing. This advancement would streamline hybrid bonding workflows and improve overall efficiency. To address this practical need, the chemical resistance of a newly developed DCT was evaluated. To remove grinding debris, cutting residues, and deposited layers generated during PD, chips mounted on the DCT were cleaned using heated chemical solutions, typically alkaline or solvent-based. For chemical resistance evaluation , DCT samples were immersed in heated alkaline or solvent-based solutions at 80 °C for 10 minutes, and their weight changes were measured. Conventional DCTs exhibited significant weight changes ranging from 9% to 36%, along with observable adhesive layer loss and curling. In contrast, the newly developed DCT demonstrated excellent chemical resistance, with weight changes below 1.3% and no signs of adhesive loss or curling. In addition to the chemical resistance test, the PD resistance of the newly developed DCT was evaluated. Using an 8-inch wafer with a thickness of 150 μm, plasma dicing was performed with a chip size of 5 mm square and a dicing line width of 1 μm. The tests confirmed that no damage occurred to the dicing lines and no chip detachment was observed during the procedure. Following plasma dicing, the cleaning process was conducted using chemicals heated to 60 °C, which effectively removed deposited layers. During this process, conventional DCTs caused scattering of over 200 chips, whereas the newly developed DCT produced no scattering chips. These results indicate that the newly developed DCT possesses both excellent chemical resistance and strong chip adhesion, even under high-temperature conditions. Subsequently, the pick-up performance of the newly developed DCT was evaluated following chemical cleaning. Ultraviolet (UV) light was irradiated from the base side of the DCT at an intensity of 10 mW/cm2 until the total exposure dose reached 350 mJ/cm2. A flip-chip bonder was then used to assess chip pick-up performance. Chips were collected from five regions of an 8-inch wafer: the center and four peripheral locations. At each region, 36 chips arranged in a 6 × 6 grid were picked up, resulting in a total of 180 chips per wafer. The pick-up height and speed were set to 1.0 mm and 1.0 mm/s, respectively. As a result, a 100% pick-up rate was achieved, indicating that UV exposure significantly reduced adhesion between the adhesive layer and the wafer even after chemical cleaning. Furthermore, no chip scattering was observed during expansion of the tape substrate, demonstrating that the newly developed DCT exhibits excellent pick-up performance. Future studies will focus on evaluating the applicability of the DCT to thinner wafers and smaller chips, as well as exploring its integration with high heat-resistant substrates to enable its use in reflow processes.