Analysis of the Effectiveness of LOBT Module Implementation in FPGAs

Onboard satellite elapsed time clocks are a crucial element of every space mission. They are often implemented in field-programmable gate array (FPGA) devices and are responsible for counting and providing elapsed time to other spacecraft modules. Many mission-specific components used for research purposes place high demands on the accuracy of time measurement. Therefore, it is necessary to ensure the precision of the measured time. This is most often achieved by cyclically synchronising the elapsed time counted by the Local On-Board Time (LOBT) module with an external reference signal. Typically, the reference signal is the pulse-per-second (PPS) signal. Naturally, the LOBT synchronisation process must meet a number of requirements. The accuracy and speed of elapsed time tuning are crucial. The LOBT logical structure implemented in FPGA devices should also be characterised by the lowest possible use of logical resources and minimal power consumption. The synchronisation process requirements and implementation requirements are often contradictory. In this article, the authors propose a hardware-based LOBT smooth resynchronisation method in which both criteria are subjected to in-depth analysis during computational considerations, simulation, and implementation in an FPGA device. The article contains a series of experimental results and conclusions that indicate the range of feasible solutions in terms of both criteria.