A Two‐Stage Differential Ring VCO With False‐Lock Suppression and Fast Settling
Jie Chen, Peng Wang, Ranran Zhou, Yong WangABSTRACT
This letter presents a two‐stage RC‐network‐based differential ring voltage‐controlled oscillator (VCO) featuring common‐mode false‐lock suppression and fast settling. A cross‐coupled latch is incorporated into the delay cell to mitigate the common‐mode false‐lock state that tends to occur in even‐stage ring VCOs. In addition, a bypass transistor is introduced in the bias path to shorten the settling time during turn‐on and is disabled in the steady state to preserve phase‐noise performance. Simulation results demonstrate a reduction in settling time from 40 µs to 2 µs while ensuring lock‐free startup. Fabricated in a 55 nm CMOS process, the prototype consumes 2.6 mW from a 1.2 V supply and operates over a frequency range of 1.31–1.89 GHz. The measured phase noise is −99.33 dBc/Hz at a 1 MHz offset from a 1.6 GHz carrier.