A Stage-Based Framework for Embedded Implementation and Experimental Validation of Fractional-Order PID Controllers

Fractional-order proportional–integral–derivative (FOPID) controllers provide additional tuning flexibility, but their operators require finite-dimensional discrete representations for implementation on embedded hardware. This study presents a stage-based workflow integrating plant identification, controller tuning, rational approximation, discretization, canonical infinite impulse response (IIR) realization, embedded implementation, and experimental evaluation. The workflow was demonstrated for Maxon DC motor speed control on an ATSAM3X8E ARM Cortex-M3 microcontroller. A FOPID controller tuned using the Ziegler–Nichols/Nelder–Mead procedure with the integral of time-weighted absolute error (ITAE) criterion was approximated by CRONE over 0.1–1000 rad/s and discretized by zero-order hold (ZOH) with a 1 ms sampling period. The resulting fifth-order discrete transfer function was implemented as a canonical IIR difference equation. Continuous- and discrete-time simulations produced similar transient responses. At a 2000 rpm motor-shaft reference (estimated 10 rpm gear-reducer output), the experiment yielded 2.0% overshoot, an integral absolute error of 0.00869, and an ITAE of 0.02249. Under the ±2% criterion, the response left the settling band after the first entry at 1.14 s, exceeding the 0.10 s target. These results support workflow feasibility while exposing a simulation-to-experiment gap due to unmodeled dynamics, measurement limitations, and implementation effects.