DOI: 10.3390/electronics12234841 ISSN: 2079-9292
A New Design Technique for a High-Speed and High dV/dt Immunity Floating-Voltage Level Shifter
Min Guo, Lixin Wang, Shixin Wang, Yuan Zhao, Bowang Li- Electrical and Electronic Engineering
- Computer Networks and Communications
- Hardware and Architecture
- Signal Processing
- Control and Systems Engineering
This paper presents a high-speed level shifter with about 500 V/ns power supply slew immunity. In this designed structure, a narrow pulse-controlled current source is adapted to accelerate the voltage conversion and reduce the power consumption. A Fast-Slewing Circuit speeds up the operation of the level shifter based on the current comparison principle. Edge detection technology is used to filter the generated voltage noise and achieve high dV/dt immunity. The proposed level shifter simulated with the 0.18 μm BCD (bipolar-CMOS-DMOS) process shows fast responses with a typical delay of 1.49 ns and 500 V/ns dV/dt immunity in the 200 V high-voltage application, which only occupies a 0.022 mm2 active area with the 0.18 μm BCD process.