DOI: 10.4218/etrij.2026-0062 ISSN: 1225-6463

A field‐programmable gate array‐based real‐time holographic processor for multilayer computer‐generated hologram using high‐bandwidth memory

Wonok Kwon, Sanghoon Cheon, Keehoon Hong

Abstract

This study presents a field‐programmable gate array (FPGA)‐based real‐time holographic processor for generating multilayer computer‐generated holograms (CGHs) from RGB‐D (RGB and depth) images and video streams at 4 K resolution at 30 frames per second (fps). By integrating high‐bandwidth memory (HBM) with an optimized single‐step Fresnel diffraction formulation, the proposed hardware architecture generates eight‐layer volumetric holograms with a 28‐ms end‐to‐end latency and an 86% power reduction compared with graphics processing unit (GPU)‐based implementations. The processor receives RGB‐D packet streams and directly outputs phase‐only holograms for spatial light modulators, achieving full‐color holographic reconstruction. HBM mitigates the computational and memory‐bandwidth bottlenecks inherent in large‐scale two‐dimensional (2D) inverse fast Fourier transform (IFFT) operations, enabling stable, high‐throughput hologram generation within a compact, low‐power FPGA device. The proposed system is validated in RGB‐D and live‐stream experiments, demonstrating accurate real‐time depth‐focusing, proving its suitability for augmented and virtual reality, automotive head‐up displays, and next‐generation immersive holographic displays.

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