A Cost-Effective PVD Thin Film Deposition System for the 3-D TSV Barrier/Seed Application

As technology complexity continues to grow in advanced IC electronics packaging, more cost effective use of capital equipment becomes mandatory. The process and cost performance of a PVD system for 3-D TSV barrier/seed metallization solution is reported. A single chamber-multi-wafer bridge tool for multiple TSV generations is configured. The TSV hardware configuration with i-PVD for batch processing improves productivity and methods to prevent via necking and at mean time enable high step coverage on aspect ratio of 10:1 vias with CD down to 5 μm. Cross-section SEM analysis on the vias with various CDs and aspect ratios shows good step coverage as deposited. Conformal post-electro-plating results confirm the continuous seed coverage.