A CMOS VCII-Based Multi-Waveform Generator with Reduced Harmonic Distortion

This paper presents a multi-stage waveform generator based on second-generation Voltage Conveyors (VCIIs). The proposed architecture enables the generation of multiple waveform types, including a sinusoid, a square wave, a triangular wave, and a reconstructed quasi-sinusoidal waveform. The system is designed using cascaded VCII-based blocks, where each stage performs a specific signal-processing function. A theoretical analysis including non-ideal effects is carried out by considering the parasitic impedances at the conveyor terminals and highlighting their impact on the frequency response and signal amplitude. The proposed architecture is validated through measurements performed with a discrete AD844-based VCII realization and through transistor-level simulations of a 0.15 μm CMOS integrated implementation. The CMOS solution includes the layout design of the VCII building block, which occupies an active area of 40 μm × 40 μm. Simulation results confirm correct operation of the CMOS implementation at distinct frequency-scaled design points between 80 kHz and 30 MHz, while the discrete AD844-based realization is validated up to 1 MHz. The obtained results also indicate an intrinsic waveform shaping mechanism, where the comparator and cascaded integration stages contribute to improving the spectral purity of the reconstructed quasi-sinusoidal output. Robustness is further verified through Total Harmonic Distortion (THD), Process-Voltage-Temperature (PVT), and Monte Carlo analyses, which show limited variability and stable performance, with a maximum THD reduction of 21.7%. At 80 kHz, the square-wave duty cycle exhibits a mean value of 50.08% and a standard deviation of 0.42% over 200 Monte Carlo runs.