A 60 GHz Low-Phase-Error Current-Reuse Variable-Gain Amplifier in 65 nm CMOS

In this article, we present a 60 GHz low-phase-error current-reuse variable-gain amplifier (VGA) in 65 nm CMOS. The proposed VGA consists of an input stage, a variable gain stage, and an output stage. An impedance-invariant VGA is used to reduce phase error during gain control. Furthermore, a transformer-based current-reuse technique is adopted to reduce dc power consumption and enhance the gain. Implemented in 65 nm CMOS technology, the proposed VGA occupies a chip area of 0.38 mm2, including pads, and consumes a dc power of 15 mW. The implemented design achieves a gain of 13.2 dB, a gain control range of 20 dB, and an RMS phase error less than 2.65° over 50–67 GHz. Additionally, the input 1-dB compression point is −11 dBm at 60 GHz.