A 11-Bit Linear-Tracking Digital LDO with Variable-Step Control and Transient Enhancement for 4.4% Voltage Overshoot/Undershoot and 99.87% Peak Current Efficiency

This paper presents an 11-bit linear-tracking digital low-dropout (DLDO) regulator with variable step size control and transient enhancement (TE) techniques to achieve low output voltage overshoot/undershoot and high current efficiency. To address overflow issues and enable multi-step cooperative regulation, a novel feed/borrow bidirectional shift register (SR) array is proposed. Based on a standard 65 nm CMOS process, the effective core layout area is 2960 μm2, and post-layout simulation results show that the proposed DLDO consumes a quiescent current of 21 μA and provides a maximum load current of 15 mA, with a peak current efficiency of 99.87%. At a 1 V input and 0.9 V output, the maximum voltage overshoot/undershoot is only 40 mV under full load step change, corresponding to an overshoot/undershoot ratio of 4.4%. The DLDO is achieved with high resolution, fast transient response, low voltage ripple, and the competitive figures of merit (FOMs), which is suitable for low-power and high-precision power management applications.